The present invention relates to data storage devices. More specifically, the present invention relates to a data storage device including a resistive cross point array of memory cells and a method and apparatus for sensing resistance states of the memory cells in the array.
Magnetic Random Access Memory ("MRAM") is a non-volatile thin-film memory that is being considered for data storage. A typical MRAM device includes an array of memory cells. Word lines extend along rows of the memory cells, and bit lines extend along columns of the memory cells. Each memory cell is located at a cross point of a word line and a bit line.
The MRAM memory cells may be based on spin dependent tunneling ("SDT") junctions. A typical SDT junction has a pinned ferromagnetic layer, a sense ferromagnetic layer and an insulating tunnel barrier sandwiched between the ferromagnetic layers. A logic value may be written to an SDT junction by applying a magnetic field that sets the SDT junction's magnetization orientation to either parallel (logic `0`) or anti-parallel (logic `1`). Relative orientation and magnitude of spin polarization of the ferromagnetic layers determine the resistance state (R or R+.DELTA.R) of the SDT junction.
Polymer memory is another non-volatile thin-film memory that is being considered for data storage. A polymer memory device also includes an array of memory cells, with word lines extending along rows of the memory cells, and bit lines extending along columns of the memory cells. The polymer memory cell includes a memory element that is based on polar conductive polymer molecules. Data is stored as a "permanent polarization" in a polymer molecule (in contrast to an SDT junction, where data is stored as a "permanent magnetic moment"). Polymer memory elements may be written by applying electric fields. Resistance state (R or R+.DELTA.R) of a polymer memory element is dependant upon the orientation of polarization of the polymer molecules.
The logic value stored in the thin-film memory element may be read by sensing the resistance state of the memory element. During a read operation on a selected memory cell, an operating potential may be applied to the bit line crossing the selected memory cell, and a ground potential may be applied to the word line crossing the selected memory cell. Consequently, a sense current flows through the memory element of the selected memory cell. This sense current indicates the resistance state of the memory element.
However, the memory cells in the array are coupled together through many parallel paths. The resistance seen at one cross point equals the resistance of the memory cell at that cross point in parallel with resistances of memory cells in the other rows and columns. In this regard, the array of memory cells may be characterized as a cross point resistor network.
To prevent sneak path currents from obscuring the sense current, an equal operating potential is applied to a subset of unselected lines (e.g., the unselected bit lines). This "equipotential method" allows the sense current to be read reliably without the use of diodes or switches for blocking the sneak path currents. The "equipotential" method is disclosed in assignee's U.S. Ser. No. 09/564,308 filed Mar. 3, 2000, issued as U.S. Pat. No. 6,259,644, and incorporated herein by reference.
It is an objective of the present invention to reduce the amount of time for sensing the resistance states of the memory cells.